This paper summarizes the design considerations and developmental status of a wideband holographic system breadboard designed to prove the feasibility of recording and reproducing digital data at 400 Mbits/sec and 40 Mbits/sec, respectively. The following critical system elements were investigated: multiplexer-demultiplexer electronics, linear data composer, polygonal mirror scanner, holographic recording techniques, and data readout devices. The feasibility of recording digital data in multichannel holographic form at high densities has been demonstrated on a subsystem basis.